The use and appreciation of the adaptability of current mirror amplifiers generally developed along with the emergence of integrated circuit technology. However, the basic circuit structure of a current mirror amplifier has been known for some time. In brief, a current mirror amplifier is constructed from two transistors. As evidence of the adaptability of current mirror amplifiers, these transistors may be constructed from most any component and process technology including, but not limited to, MOSFETs and vertical bipolar transistors. Of general interest are those constructed using a standard silicon processing technology to provide planar MOSFETs.
To form the current mirror amplifier, the drain electrode of a first transistor Q.sub.1 is connected in common to the gate electrode of both transistors Q.sub.1, Q.sub.2. The source electrodes of the transistors Q.sub.1, Q.sub.2 are commonly connected to a reference voltage potential rail. The current mirror amplifier is thus formed with the drain electrode of Q.sub.1 generally acting as a input while the drain electrode of Q.sub.2 effectively acts as an output.
The drain to gate connection of transistor Q.sub.1 results in its saturated operation. Thus, the input terminal of the current mirror amplifier will tend to accept whatever level of current is provided. Since both transistors Q.sub.1 and Q.sub.2 share a common gate bias potential and relative gate to source potential difference, transistor Q.sub.2 will tend to accept a similar current level through its drain electrode. If given that the transconductance of transistors Q.sub.1 and Q.sub.2 are equal, the output of the current mirror amplifier will draw a current level identical to the "reference" current level established at the input of the current mirror amplifier. Perhaps the principle advantage of this mode of operation is that the output current level is relatively independent of the voltage potential at the output, so long as it is generally sufficient to maintain Q.sub.2 in saturated operation.
As suggested above, the principal use of the current mirror amplifier is as a simple current sink or source that can be set according to an independent reference current level. There are, however, a large variety of other uses of current mirror amplifiers including their use in analog-to-digital conversion, auto-correction and auto-stabilization circuits. Principle among these other uses, perhaps, is its use as an integral part of a differential gain stage within many general purpose and high performance operational amplifiers.
In all of the foregoing applications, a common problem persists in the use of current mirror amplifiers. Generally stated, the problem is that the transconductance of the transistors Q.sub.1, Q.sub.2 are matched to only a certain degree. Perhaps more accurately, since current mirror amplifiers may be easily adapted to provide current gain, the problem is a failure to accurately obtain a desired ratio of transconductances for the transistors Q.sub.1, Q.sub.2. This arises due to the fact that, regardless of the precautions taken, localized variations in the processing of the transistors Q.sub.1, Q.sub.2, will always obtain with the direct result that their transconductances will variably deviate from their desired values. Although the differences between the desired and the obtained transconductance ratios may be quite small, it is often quite sufficient to negatively impact the accurate operation of a related circuit. For example, the use of the current mirror amplifier as an integral part of an operational amplifier's gain stage results in a substantial amplification of the transconductance difference error at the output of the operational amplifier. Consequently, it is greatly desired that some manner of adjusting the transconductance match ratio of the transistors Q.sub.1, Q.sub.2 be provided with or as part of the current mirror amplifier.
In providing any such manner of adjusting the transconductance ratio of the transistors Q.sub.1, Q.sub.2, a number of concerns must be simultaneously addressed. These concerns include providing for the transconductance ratio adjustment without impacting the nominal operation of the current mirror amplifier or its adaptability to be used in any desired application. Further, the adjustment circuit itself should not be so sensitive to its operating conditions as to effectively obviate any improvements obtained through the provision of transconductance ratio adjustability.
Numerous circuit and processing schemes have been proposed and implemented to reduce the effects of the difference between actual and desired transconductance ratios and to provide for the direct adjustment of the transconductance of either or both of the transistors Q.sub.1, Q.sub.2. Among these schemes are the provision of respective resistors in the source electrode conduction paths of the transistors Q.sub.1, Q.sub.2. Alternately, resistors may be place between the respective gates electrodes of transistors Q.sub.1, Q.sub.2 and their interconnection to the drain electrode of Q.sub.1. In both cases, the tolerance control over the resistance value of the resistors largely becomes the controlling factor in obtaining the desired transconductance ratio for the current mirror amplifier as a whole. However, the tolerance control over the resistance values may often be insufficient for the design goals of many applications.
Another scheme for providing an effective adjustment to the transconductance ratio is through the use of an additional current balancing network. Such a network is typically external to integrated circuit implementations of current mirror amplifiers and thus immediately evidences the undesirable network component selection and placement aspect of its implementation. Other undesirable aspects of this scheme include manufacturing cost and potential temperature sensitivity, at least to the extent that the thermal response of the external components may be significantly different from that of the current mirror amplifier as implemented as an integrated circuit.
A more recent and comparatively more accurate method of effectively achieving the desired transconductance ratio is through the use of component trimming. In practice, this typically involves the use of a laser to adjust the post-processing resistance value of integrated circuit components that set the current level to the imput of the current mirror amplifier or, most directly, the transconductance of Q.sub.1 itself. Though such component trimming can be effectively used to establish the exact transconductance ratio desired, the trimmed resistance values are generally accurate only for a particular temperature. Thus, environmental changes or simply a steady state environment different from that for which the components were trimmed may defeat the effective adjustment of the transconductance ratio.
An even more recent circuit scheme for modifying the transconductance ratio is shown in U.S. Pat. No. 4,068,182, issued to Dingwall, et al. on Jan. 10, 1978. There, an additional FET Q.sub.3 is provided to divert a portion of the reference current that would otherwise pass through transistor Q.sub.1. The source and drain electrodes of the FET Q.sub.3 are coupled to the corresponding respective electrodes of Q.sub.1. The gate electrode of the FET Q.sub.3 is provided with a bias potential such that the FET operates in its linear region. In this manner, a controlled portion of the reference current, proportional to the gate biasing potential, is not reflected in the relative gate to source voltage potential of transistor Q.sub.1. Therefore, the balance, or effective transconductance ratio, of the current mirror amplifier is correspondingly modified. Unfortunately, the input voltage potential and corresponding current level sunk by transistor Q.sub.1 may vary in many applications. Since the drain electrode of the balance adjustment FET Q.sub.3 is commonly connected to the input of the current mirror amplifier, it too experiences the same drain voltage fluctuations. As the adjustment FET Q.sub.3 is operating in its linear region, these drain voltage variations translate into significant changes in its channel conductance. Consequently, the balance point or apparent transconductance ratio of the current mirror amplifier will change with each and every fluctuation in the drain voltage potential of the adjustment FET Q.sub.3.